搜索资源列表
fir
- 使用verilog语言实现的fir滤波器，使用了内部的触发器资源，优化。-Verilog language used to achieve the fir filter, the use of internal resources of the flip-flop, and optimize.
firfilterverilog
- 用VERILOG语言实现的FIR数字滤波器-VERILOG language with the FIR digital filter
Verilogdigitlefilter
- 用verilog代码实现在数字滤波器，可以综合。-verilog code for digital filter
fft
- 用verilog语言编写的基于DA结构的滤波器的实现-filter
verilogFir
- 基于Verilog+HDL的FIR数字滤波器设计与仿真 -Verilog+ HDL based on the FIR digital filter design and simulation
fir
- fir 滤波器 Systems generator 实现并转化为verilog语言-fir Filter Systems generator to achieve and into verilog language
fir_filter
- 使用Verilog编程实现的分布式FIR滤波器源码，经过调试能够完成功能-Distributed programming using the Verilog source code FIR filters, after a debugging feature to complete
cic_dec_14_three_2
- 2倍抽取14位的3级CIC滤波器的FPGA实现的verilog代码-cic filter
a
- 个人整理的关于FIR滤波器、加法器、减法器的verilog程序，供大家下载-It’s about some programs about filter，and some others I‘ll be happy if it s better for you~~~
firVerilog
- 用verilog语言编写的一个FIR滤波器的程序-Verilog language with a FIR filter process
fir
- 用verilog编写的fir滤波器程序,可实现fir的硬件综合-Fir filters using verilog written procedures
fir
- 做作业的时候用VERILOG编写的FIR滤波器程序，希望对大家有用-Homework time FIR filter with VERILOG written procedures, we want to be useful
fir_srg
- 该程序是利用Verlag HDL硬件描述语言实现的fir数字滤波器，希望对刚学习verilog的朋友有所帮助。-The procedure is to use Verlag HDL hardware descr iption language implementation of fir digital filters, just want to help a friend learn verilog.
ser_fir
- 用verilog实现一个8阶的改进串行FIR低通滤波器，输入数据位宽为12比特,经符号扩展后变为13比特。-With verilog order to achieve an improvement of 8 serial FIR low-pass filter, the input data bit width of 12 bits by sign extension into a 13-bit after.
FILTER
- 数字滤波器设计实例，里面包含VERILOG语言和MATLAB语言写的代码。-Digital filter design example, which contains the VERILOG language and MATLAB language to write code.
Verilogrealizationofdigitalfilters
- 一款基于Verilog实现的数字滤波器 值得收藏的好代码-Verilog realization of digital filters
fir_16
- 用Verilog写的fir滤波器，16阶8位位宽，看看吧-Written using Verilog fir filter, 16-order 8-bit wide, to see if it
jiancelvbo
- 滤波器加上功率检测的verilog语言，对于嵌入式研发人员有较大的帮助，由于能力有限，请多包涵-Filters with power detection verilog language for embedded developers have a greater help, as capacity is limited, like him indulgence
soccccc
- 此文主要是基于VERILOG HDL 硬件实现的soc系统，主要功能是实现了基于Intel8051的滤波器系统-This article is based mainly on the soc VERILOG HDL hardware system, the main function is to achieve a filter system based on Intel8051